Intel announces Cascade Lake Xeons: 48 cores and 12-channel memory per socket

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According to (This article and its images were originally posted on Ars Technica November 5, 2018 at 02:03AM.)

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ntel has announced the next family of Xeon processors that it plans to ship in the first half of next year. The new parts represent a substantial upgrade over current Xeon chips, with up to 48 cores and 12 DDR4 memory channels per socket, supporting up to two sockets.

These processors will likely be the top-end Cascade Lake processors; Intel is labeling them “Cascade Lake Advanced Performance,” with a higher level of performance than the Xeon Scalable Processors (SP) below them. The current Xeon SP chips use a monolithic die, with up to 28 cores and 56 threads. Cascade Lake AP will instead be a multi-chip processor with multiple dies contained within a single package. AMD is using a similar approach for its comparable products; the Epyc processors use four dies in each package, with each die having 8 cores.

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This article and images were originally posted on [Ars Technica] November 5, 2018 at 02:03AM. Credit to the original author and Ars Technica | ESIST.T>G>S Recommended Articles Of The Day.

 

 

 

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